A) F2 B) F1 C) F3
A) 5k B) 1ΚΩ C) 10ΚΩ D) 220k
A) 5V B) 0V C) 10V D) 1µF
A) 1 B) 3 C) 1ns D) 2ns
A) 20ms B) 100ms C) 5ms D) 10ms
A) Pulse B) .meas C) .op D) .tran
A) Using cursor differences in voltage vs. time plot B) transient analysis C) None of them
A) An exponential decay curve. B) Exponential rise C) Exponential rise to steady state
A) R x C B) R/C C) C x R D) R-C
A) 0Hz B) 1Hz C) 5Hz D) -1Hz
A) 120 B) 100 C) 10 D) 50
A) 1MHz B) Highest frequency C) 2MHz D) Low frequency
A) Frequency B) gain C) Bode plot D) High frequency
A) Half point (0.70 of peak amplitude) B) Half power point (0.707 of peak amplitude) C) half of its maximum power.
A) 12V B) 120V C) 170 V peak D) 220V
A) 10μF B) 100μF C) 1000μF D) 2200µF
A) Bridge rectifier B) Bridge configuration with two diodes C) Bridge configuration with four diodes
A) Peak-to-peak voltage measurement B) None of them C) difference between the maximum and minimm voltage
A) Output power / Input power × 100% B) Input power / output power x 100% C) Input power x output power
A) LM741 B) LT101 C) LT1001 D) LM1001
A) -15V B) 15V C) ±15V D) 5V
A) 13 B) 10 C) 11 D) 12
A) 1 V peak sine wave B) All of the above C) 2V sine wave D) 1V sine wave
A) Bandwidth B) Sine wave C) Frequency at -3dB point from midband gain D) Frequency at 3dB point from midband gain
A) 1ΚΩ B) 10ΚΩ C) 20ΚΩ D) 120Ω
A) CMRR B) Low Output Impedance C) High Input Impedance
A) 220 B) 10ΚΩ C) 1ΚΩ D) 120
A) Apply a common-mode signal B) Identical signals applied to both inputs C) difference amplifier configuration
A) Apply a small differential input Vd=V-V-VdV+ -V B) Connect the inputs C) Output voltage / differential input voltage
A) 1kHz B) drops by -3dB C) 10kHz D) drops by 3dB
A) Sallen-Key B) VCVS filter topology C) Swollen-key
A) -90 Celsius B) 80 degrees C) -90 degrees D) -120 degrees
A) 4 dB/decade B) Filter order (n) or slope in dB/decade C) -40 dB/decade D) All of the above
A) 0.770 B) 0.7777 C) 0.707 D) 0707
A) ±15V B) 5V C) 12V D) 15V
A) 100Ω B) 2kΩ C) 1ΚΩ
A) 5V B) 12V C) 15V D) 120V
A) Power supply B) AVout/Alload C) AIIoad / AVout
A) Parallel sense resistor with feedback B) Series sense resistor with feedback C) Power supply
A) Clap Oscillator B) Colpitts Oscillator C) Wien bridge D) Phase-Shift Oscillator
A) RC time constant B) Period and frequency C) Frequency-selective componentsi
A) Use oscilloscope to see how the output frequency changes B) Amplitude stabilizer C) AGC circuit with thermistor D) Use a frequency counter
A) Use a frequency counter B) oscilloscope to see how the output frequency changes C) Long-term frequency drift measurement
A) Exponential amplitude growth to steady state B) Across the resistance C) Closed loop gain
A) 1kHz B) 50KHz C) 100kHz D) 15KHz
A) negative feedback control B) PWM feedback control C) Voltage-Mode Control (VMC)
A) Pout x Pin x 100% B) (Pin/Pout) x 100% C) (Pout/Pin) x 100%
A) Output voltage not settling time B) Output voltage settling time C) Damping ration
A) 10μΗ B) 100μΗ C) 1000μΗ D) 1μΗ
A) Tolerance Analysis B) transient analysis C) Monte Carlo D) AC analysis
A) Using Netlist B) CAD C) Using . Meas command D) Using.subckt definition
A) .meas B) .op C) .param D) .tran
A) SPICE compatible image format B) SPICE compatible text format C) Plain Text
A) Top down design B) Visual hierarchy C) All of the above D) Symbol creation with subcircuits
A) Maximum timestep = 1/100 of smallest time constant B) Minimum timestep = 100 of smallest time constant C) Maximum timestep = 1/100 of Highest time constant
A) .options B) min= 1-9 C) gmin = 1e-9 D) gmin=1e E) min= 1e-9
A) .ic command with node voltages B) .step C) .param D) .TRAN
A) abstol B) abstol 1e-12 C) Reltol D) Reltol 1e-12
A) Reduce increment size B) Tighten Convergence Settings C) Modify gmin stepping D) Refine the mesh
A) Left-click plot, export data as text B) Right-click plot, export data as text C) File Export command from the Plot Pane
A) Node2 B) node1 C) .MEAS D) V(node1)-V(node2)
A) .op B) .param C) .meas tran rms RMS V(out) D) .tran
A) .AC B) .tran C) .fft V(out) D) .op
A) .AC B) .tran C) .meas avg power = avg (V(n1)*I(R1)) D) .MEAS P_AVG AVG V(R1)*I(R1) E) .param
A) Press F4 or the “label net" B) Prefix with functional description C) Comment Text for descriptive labels and Net Name Labels/Ports D) Hierarchical prefix with functional description
A) Rename the schematic B) SPICE directives with comments C) Add comments D) using a text file to document
A) Dedicated folder for each individual circuit project B) Separate folders for each analysis type C) My Documents\LTspiceXVII
A) .measure B) Clarity, functionality, and portability C) ProjectName_CircuitType_Version
A) External Version Control System (VCS) B) use the .step param command C) Sequential backup with date stamps
A) Systematic node voltage checking B) Systematic, multi-analysis comparison C) Verification vs. Validation
A) Error log analysis and stepping B) Check for syntax and units C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Systematic process B) Progressive component addition
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 1uF B) 100uF C) 1000uF |